'A' Students book online at best prices in India on Read Computing & Informatics: For A.M.I.E. Sec. 'A' Students book reviews & author details and. - download AMIE - Section - (A) Computing and Informatics (AD, AN- ) Diploma Solved and Unsolved Paper (Summer, ) book online at best. The text in this book is based on the syllabus of the newly introduced subject AN- /AD Computing and Informatics of AMIE book has.

Computing And Informatics Book For Amie

Language:English, Japanese, French
Genre:Children & Youth
Published (Last):28.09.2016
ePub File Size:24.79 MB
PDF File Size:12.84 MB
Distribution:Free* [*Sign up for free]
Uploaded by: IOLA

These are good books for making base strong. And if you are clear with basics or have less time go with computer and informatics book of jain. Computing Informatics is a hard subject for those not studied IT/Computers. For this subject I have bought two books along with study materials. How to pass Computing & Informatics - Introduce Yourself - AMIE Study pack i.e. the computing and informatics book. if u go through last five.

Mesh TopologyMesh topologies involve the concept of routes. Unlike each of the previous topologies,messages sent on a mesh network can take any of several possible paths from source todestination. Recall that even in a ring, although two cable paths exist, messages can onlytravel in one direction. Some WANs, like the Internet, employ mesh routing. SummaryTopologies remain an important part of network design theory.

You can probably build ahome or small business network without understanding the difference between a busdesign and a star design, but understanding the concepts behind these gives you a deeperunderstanding of important elements like hubs, broadcasts, and routes Internet protocol suite Internet protocol suite Layer Protocols 5.

The Internet protocol suite — like many protocol suites — can be viewed as a set oflayers, each layer solves a set of problems involving the transmission of data, andprovides a well-defined service to the upper layer protocols based on using services fromsome lower layers. Upper layers are logically closer to the user and deal with moreabstract data, relying on lower layer protocols to translate data into forms that caneventually be physically transmitted.

The OSI model describes a fixed, seven layer stack for networking protocols. In , Robert E.

Kahn was hired at the DARPA InformationProcessing Technology Office, where he worked on both satellite packet networks andground-based radio packet networks, and recognized the value of being able tocommunicate across them. By the summer of , Kahn and Cerf had soon worked out a fundamentalreformulation, where the differences between network protocols were hidden by using acommon internetwork protocol, and instead of the network being responsible for 7.

With the role of the network reduced to the bare minimum, it became possible to joinalmost any networks together, no matter what their characteristics were, thereby solvingKahns initial problem.

A computer called a gateway later changed torouter to avoid confusion with other types of gateway is provided with an interface toeach network, and forwards packets back and forth between them. The idea was worked out in more detailed form by Cerfs networking research group atStanford in the —74 period. The early networking work at Xerox PARC, whichproduced the PARC Universal Packet protocol suite, much of which wascontemporaneous, was also a significant technical influence; people moved between thetwo.

Four versions were developed: Layers in the Internet protocol suite stackIP suite stack showing the physical network connection of two hosts via two routers andthe corresponding layers used at each hopSample encapsulation of data within a UDP datagram within an IP packetThe IP suite uses encapsulation to provide abstraction of protocols and services.

Generally a protocol at a higher level uses a protocol at a lower level to help accomplishits aims. For most users, there is no need to look for implementations. Karnaugh mapThe Karnaugh map, also known as a Veitch diagram K-map or KV-map for short , isa tool to facilitate management of Boolean algebraic expressions. A Karnaugh map isunique in that only one variable changes value between squares, in other words, the rowsand columns are ordered according to the principles of Gray code.

History and nomenclatureThe Karnaugh map was invented in by Maurice Karnaugh, a telecommunicationsengineer at Bell Labs. Usage in boolean logicNormally, extensive calculations are required to obtain the minimal expression of aBoolean function, but one can use a Karnaugh map instead. Karnaugh maps also help teach about Boolean functions and minimization. PropertiesA mapping of minterms on a Karnaugh map. The arrows indicate which squares can bethought of as "switched" rather than being in a normal sequential order.

A Karnaugh map may have any number of variables, but usually works best when thereare only a few - between 2 and 6 for example. Each variable contributes two possibilitiesto each possibility of every other variable in the system. Karnaugh maps are organized sothat all the possibilities of the system are arranged in a grid form, and between twoadjacent boxes, only one variable can change value.

This is what allows it to reducehazards. When using a Karnaugh map to derive a minimized function, one "covers" the ones onthe map by rectangular "coverings" that contain a number of boxes equal to a power of 2 for example, 4 boxes in a line, 4 boxes in a square, 8 boxes in a rectangle, etc.

Once aperson has covered the ones, that person can produce a term of a sum of products byfinding the variables that do not change throughout the entire covering, and taking a 1 tomean that variable, and a 0 as the complement of that variable.

Doing this for everycovering gives you a matching function. One can also use zeros to derive a minimized function. The procedure is identical to theprocedure for ones, except that each term is a term in a product of sums - and a 1 meansthe compliment of the variable, while 0 means the variable non-complimented. Each square in a Karnaugh map corresponds to a minterm and maxterm. The picture tothe right shows the location of each minterm on the map.

ExampleConsider the following function: This function has this truth table: The most convenient way to arrange this is in a 4x4 grid. The binary digits in the map represent the functions output for any given combination ofinputs.


Note that the values are ordered in a Gray code, so that precisely onevariable flips between any pair of adjacent cells. After the Karnaugh map has been constructed our next task is to find the minimal termsto use in the final expression.

These terms are found by encircling groups of 1s in themap. The encirclings must be rectangular and must have an area that is a positive powerof two i. The rectangles should be as large as possible without containingany 0s. The optimal encirclings in this map are marked by the green, red and blue lines. For each of these encirclings we find those variables that have the same state in each ofthe fields in the encircling.

For the first encircling the red one we find that: Thus the first term in the Boolean expression is AC. For the green encircling we see that A and B maintain the same state, but C and D change. B is 0 and has to be negated before it can be included. Thus the second term is AB. In the same way, the blue rectangle gives the term BCD and so the whole expression is: The inverse of a function is solved in the same way by encircling the 0s instead.

In a Karnaugh map with n variables, a Boolean term mentioning k of them will have acorresponding rectangle of area 2n-k. Karnaugh maps also allow easy minimizations of functions whose truth tables include"dont care" conditions that is sets of inputs for which the designer doesnt care what theoutput is because "dont care" conditions can be included in a ring to make it larger butdo not have to be ringed. Race hazardsKarnaugh maps are useful for detecting and eliminating race hazards.

They are very easyto spot using a Karnaugh map, because a race condition may exist when moving betweenany pair of adjacent, but disjointed, regions circled on the map. For this case, the output is defined to remain unchanged at 1, but because this transition is not covered by a specific term in the equation, a potential for a glitch a momentary transition of the output to 0 exists.

In this case the glitch wraps around from the bottom of the map to the top of the map. Whether these glitches do occur depends on the physical nature of the implementation,and whether we need to worry about it depends on the application.

The term is redundant in terms of the static logic of the system, but such redundant termsare often needed to assure race-free dynamic performance. When not to use K-mapsThe diagram becomes cluttered and hard to interpret if there are more than four variableson an axis.

This argues against the use of Karnaugh maps for expressions with more thansix variables. For such expressions, the Quine-McCluskey algorithm, also called themethod of prime implicants, should be used.

This algorithm generally finds most of the optimal solutions quickly and easily, butselecting the final prime implicants after the essential ones are chosen may still requirea brute force approach to get the optimal combination though this is generally farsimpler than trying to brute force the entire problem. Logic gateA logic gate performs a logical operation on one or more logic inputs and produces asingle logic output.

The logic normally performed is Boolean logic and is mostcommonly found in digital circuits. Logic gates are primarily implemented electronicallyusing diodes or transistors, but can also be constructed using electromagnetic relays,fluidics, optical or even mechanical elements.

Logic levelsA Boolean logical input or output always takes one of two logic levels.

These logic levelscan go by many names including: For consistency, the names 1 and 0 will be used below. Logic gatesA logic gate takes one or more logic-level inputs and produces a single logic-level output.

Because the output is also a logic level, an output of one logic gate can connect to theinput of one or more other logic gates. Two outputs cannot be connected together,however, as they may be attempting to produce different logic values. In electronic logicgates, this would cause a short circuit. In electronic logic, a logic level is represented by a certain voltage which depends on thetype of electronic logic in use. Each logic gate requires power so that it can source andsink currents to achieve the correct output voltage.

Computer Science

In logic circuit diagrams the power isnot shown, but in a full electronic schematic, power connections are required. BackgroundThe simplest form of electronic logic is diode logic.

To build a complete logicsystem, valves or transistors can be used. The simplest family of logic gates using bipolartransistors is called resistor-transistor logic, or RTL. Unlike diode logic gates, RTL gatescan be cascaded indefinitely to produce more complex logic functions. These gates wereused in early integrated circuits. It was then discovered thatone transistor could do the job of two diodes in the space of one diode, so transistor-transistor logic, or TTL, was created.

In some types of chip, to reduce size and powerconsumption still further, the bipolar transistors were replaced with complementary field-effect transistors MOSFETs , resulting in complementary metal-oxide-semiconductor CMOS logic. For small-scale logic, designers now use prefabricated logic gates from families ofdevices such as the TTL series invented by Texas Instruments and the CMOS series invented by RCA, and their more recent descendants.

These devices usuallycontain transistors with multiple emitters, used to implement the AND function, whichare not available as separate components.

Increasingly, these fixed-function logic gatesare being replaced by programmable logic devices, which allow designers to pack a hugenumber of mixed logic gates into a single integrated circuit. The field-programmablenature of programmable logic devices such as FPGAs has removed the hard property ofhardware; it is now possible to change the logic design of a hardware system by Electronic logic gates differ significantly from their relay-and-switch equivalents.

Theyare much faster, consume much less power, and are much smaller all by a factor of amillion or more in most cases. Also, there is a fundamental structural difference. Theswitch circuit creates a continuous metallic path for current to flow in either direction between its input and its output. The semiconductor logic gate, on the other hand, acts asa high-gain voltage amplifier, which sinks a tiny current at its input and produces a low-impedance voltage at its output.

It is not possible for current to flow between the outputand the input of a semiconductor logic gate. Another important advantage of standardised semiconductor logic gates, such as the and families, is that they are cascadable.

This means that the output of one gate canbe wired to the inputs of one or several other gates, and so on ad infinitum, enabling theconstruction of circuits of arbitrary complexity without requiring the designer tounderstand the internal workings of the gates. In practice, the output of one gate can only drive a finite number of inputs to other gates,a number called the fanout limit, but this limit is rarely reached in the newer CMOSlogic circuits, as compared to TTL circuits.

Also, there is always a delay, called thepropagation delay, from a change in input of a gate to the corresponding change in itsoutput.

When gates are cascaded, the total propagation delay is approximately the sum ofthe individual delays, an effect which can become a problem in high-speed circuits. Electronic logic levelsThe two logic levels in binary logic circuits are represented by two voltage ranges, "low"and "high". Each technology has its own requirements for the voltages used to representthe two logic levels, to ensure that the output of any device can reliably drive the input ofthe next device.

Usually, two non-overlapping voltage ranges, one for each level, aredefined. The difference between the high and low levels ranges from 0. They can be built from relays or transistors, or anyother technology that can create an inverter and a two-input AND or OR gate. For an input of 2 variables, there are 16 possible boolean algebra outputs. These 16outputs are enumerated below with the appropriate function or logic gate for the 4possible combinations of A and B.

Note that not all outputs have a corresponding For examples, see the series of CMOS logic chips or the series. The "distinctive shape" set, based ontraditional schematics, is used for simple drawings and is quicker to draw by hand. It issometimes unofficially described as "military", reflecting its origin if not its modernusage. The "rectangular shape" set, based on IEC , has rectangular outlines forall types of gate, and allows representation of a much wider range of devices than ispossible with the traditional symbols.

The circle on the symbolis called a bubble, and is generally used in circuit diagrams to indicate an inverted inputor output. Additionally, Thisreflects the equivalency due to De Morgans law, but it also allows a diagram to be readmore easily, or a circuit to be mapped onto available physical gates in packages easily,since any circuit node that has bubbles at both ends can be replaced by a simple bubble-less connection and a suitable change of gate.

This is commonly seen inreal logic diagrams - thus the reader must not get into the habit of associating the shapesexclusively as OR or AND shapes, but also take into account the bubbles at both inputsand outputs in order to determine the "true" logic function indicated.

The two input Exclusive-OR is true only when the two input values are different,false if they are equal, regardless of the value. If there are more than two inputs, the gategenerates a true at its output if the number of trues at its input is odd [1].

In practice,these gates are built from combinations of simpler logic gates. The chip, containing four NANDs.


This leads to a separate set of symbolswith inverted inputs and the opposite core symbol. These symbols can make circuitdiagrams for circuits using active low signals much clearer and help to show accidentalconnection of an active high output to an active low input or vice-versa. Storage of bitsRelated to the concept of logic gates and also built from them is the idea of storing a bitof information. The gates discussed up to here cannot store a value: It is possible to make a storage element eitherthrough a capacitor which stores charge due to its physical properties or by feedback.

Connecting the output of a gate to the input causes it to be put through the logic again,and choosing the feedback correctly allows it to be preserved or modified through the useof other inputs. A set of gates arranged in this fashion is known as a "latch", and morecomplicated designs that utilise clocks signals that oscillate with a known period andchange only on the rising edge are called edge-triggered "flip-flops".

The combination ofmultiple flip-flops in parallel, to store a multiple-bit value, is known as a register. These registers or capacitor-based circuits are known as computer memory. They vary inperformance, based on factors of speed, complexity, and reliability of storage, and manydifferent types of designs are used based on the application.

Three-state logic gates A tristate buffer can be thought of as a switch.

If B is on, the switch is closed. If B is off,the switch is open. Main article: Tri-state bufferThree-state, or 3-state, logic gates have three states of the output: The high-impedance state plays no role in the logic, which remainsstrictly binary.

These devices are used on buses to allow multiple chips to send data. Agroup of three-states driving a line with a suitable control circuit is basically equivalent toa multiplexer, which may be physically distributed over separate devices or plug-in cards. Tri-state, a widely-used synonym of three-state, is a trademark of the NationalSemiconductor Corporation.

MiscellaneousLogic circuits include such devices as multiplexers, registers, arithmetic logic units ALUs , and computer memory, all the way up through complete microprocessors whichcan contain more than a million gates.

In reversible logic, Toffoli gates are used. History and developmentThe earliest logic gates were made mechanically. Charles Babbage, around , devisedthe Analytical Engine. His logic gates relied on mechanical gearing to performoperations. Electromagnetic relays were later used for logic gates. In , AlmonStrowger patented a device containing a logic gate switch circuit U.

Patent Strowgers patent was not in widespread use until the s. Starting in , NikolaTesla filed for patents of devices containing logic gate circuits see List of Tesla patents.

Eventually, vacuum tubes replaced relays for logic operations. Claude E. Shannon introduced the use of Boolean algebra in the analysis and design of switchingcircuits in Walther Bothe, inventor of the coincidence circuit, got part of the Nobel Prize in physics, for the first modern electronic AND gate in Active researchis taking place in molecular logic gates. Adders electronics In electronics, an adder is a device which will perform the addition, S, of two numbers.

Although adders can be constructed for many numerical representations, such as Binary-coded decimal or excess-3, the most common adders operate on binary numbers. In caseswhere twos complement is being used to represent negative numbers it is trivial tomodify an adder into an adder-subtracter. For single bit adders, there are two general types. A half adder has two inputs, generallylabelled A and B, and two outputs, the sum S and carry output Co. Essentially the output of a half adder is thetwo-bit arithmetic sum of two one-bit numbers, with Co being the most significant ofthese two outputs.

The other type of single bit adder is the full adder which is like a half adder, but takes anadditional input carry Ci. A full adder can be constructed from two half adders byconnecting A and B to the input of one half adder, connecting the sum from that to aninput to the second adder, connecting Ci to the other input and or the two carry outputs.

The output of the full adder is the two-bitarithmetic sum of three one-bit numbers. The purpose of the carry input on the full-adder is to allow multiple full-adders to bechained together with the carry output of one adder connected to the carry input of thenext most significant adder. The carry is said to ripple down the carry lines of this sort ofadder, giving it the name ripple carry adder.

Half adderHalf adder circuit diagramA half adder is a logical circuit that performs an addition operation on two binary digits. The half adder produces a sum and a carry value which are both binary digits.

Following is the logic table for a half adder: The full adder produces a sum and carry value, which are both binary digits. It can becombined with other full adders see below or work on its own. This is because the only discrepancy between OR andXOR gates occurs when both inputs are 1; for the adder shown here, one can check this isnever possible.

Using only two types of gates is convenient if one desires to implementthe adder directly using common IC chips.

Ones complementAlternatively, a system known as ones complement can be used to represent negativenumbers. The ones complement form of a binary number is the bitwise NOT applied to it— the complement of its positive counterpart. Like sign-and-magnitude representation,ones complement has two representations of 0: To add two numbers represented in this system, one does a conventional binary addition,but it is then necessary to add any resulting carry back into the resulting sum. The binary addition alone gives —not the correct answer!

Only when the carryis added back in does the correct result appear. A remark on terminology: The system is referred to as "ones complement" because thenegation of x is formed by subtracting x from a long string of ones. Twos complementarithmetic, on the other hand, forms the negation of x by subtracting x from a single largepower of two. It is also an operation of negation converting positive to negativenumbers or vice versa in computers which represent negative numbers using twoscomplement.

Its use is ubiquitous today because it doesnt require the addition andsubtraction circuitry to examine the signs of the operands to determine whether to add or Also, 0 has only a single representation, obviating the subtletiesassociated with negative zero which exists in ones complement. The boundary between positive and negative numbers may theoretically be anywhere aslong as you check for it. For convenience, all numbers whose left-most bit is 1 areconsidered negative. The largest number representable this way with 4 bits is 7 and the smallest number is To understand its usefulness for computers, consider the following.

Adding 3 to -1 results in the seemingly-incorrect However, ignoring the 5th bit fromthe right , as we did when we counted backwards, gives us the actual answer, 2.

Ignoring the 5th bit will work in all cases although you have to do the aforementionedoverflow checks when, eg, is added to Thus, a circuit designed for additioncan handle negative operands without also including a circuit capable of subtraction anda circuit which switches between the two based on the sign.

Moreover, by this methodan addition circuit can even perform subtractions if you convert the necessary operandinto the "counting-backwards" form. The procedure for doing so is called taking the twos Lastly, a very important reason for utilizing twos complement representation is that itwould be considerably more complex to create a subtraction circuit which would take - and give ie than it is to make one that returns Doing theformer means you have to check the sign, then check if there will be a sign reversal, thenpossibly rearrange the numbers, and finally subtract.

Doing the latter means you simplysubtract, pretending theres an extra left-most bit hiding somewhere. If the sign bit is 0, the value is positive; if it is 1, the value is negative.

AMIE - Section - (A) Computing and Informatics (AD,AN) Diploma Solved and Unsolved Paper

To negate a twoscomplement number, invert all the bits then add 1 to the result. The absolute value of the mostnegative number cannot be represented with the same number of bits, because it is greaterthan the most positive number that twos complement number by exactly 1.

Using twos complement to represent negative numbers allows only one representation ofzero, and to have effective addition and subtraction while still having the most significantbit as the sign bit. Calculating twos complementIn finding the twos complement of a binary number, the bits are inverted, or "flipped", byusing the bitwise NOT operation; the value of 1 is then added to the resulting value.

Bitoverflow is ignored, which is the normal case with zero. For example, beginning with the signed 8-bit binary representation of the decimal value5: To obtain thetwos complement, 1 is added to the result, giving: The most significant bit is 1, so the value is negative.

The twos complement of a negative number is the corresponding positive value. Also the twos complement ofthe most negative number representable e. This happens because the most negative numbers "positive counterpart" isoccupied by "0", which gets classed as a positive number in this argument.

Hence, thereappears to be an extra negative number. For example, to find the 4 bit representation of You can also think of the equation as being entirely in base 10, converting to base 2at the end, e. Nevertheless, a shortcut exists when converting a binary number in twos complementform. Copy downthat one, and then flip the remaining bits.

This will allow you to convert to twoscomplement without first converting to ones complement and adding 1 to the result.

Thetwos complemented form of the number above in this case is: Some processors have instructions to do this in a single instruction. On other processors aconditional must be used followed with code to set the relevant bits or bytes.

Similarly, when a twos complement number is shifted to the right, the sign bit must bemaintained. However when shifted to the left, a 0 is shifted in. These rules preserve thecommon semantics that left shifts multiply the number by two and right shifts divide thenumber by two. Both shifting and doubling the precision are important for some multiplicationalgorithms. Note that unlike addition and subtraction, precision extension and rightshifting are done differently for signed vs unsigned numbers.

The weird numberWith only one exception, when we start with any number in twos complementrepresentation, if we flip all the bits and add 1, we get the twos complementrepresentation of the negative of that number.

Negative 12 becomes positive 12, positive5 becomes negative 5, zero becomes zero, etc. The most negative number in twos complement is sometimes called "the weird number"because it is the only exception.

Please guide me how can score a good marks in this subject? January 01, , Quote from: Tips to Crack Computing and Informatics If we see the syllabus of computing and informatics we see that syllabus is get divided into three fallowing part which are fallowing.

Programming Language section 2. Computer Hardware section 3. Computer Software section Non IT background student facing problem in first part which is programming language. Programming language having major stake in question paper of computing and informatics so we can not ignore it. For Non IT Student they should first complete computer hardware and computer software. If we look at last two to three year question paper we see that Binary conversion and Logic Gates are compulsory question so make strong command over this.

If we look at past few year question paper we find that Networking question asked regularly so networking question may be your sure marks if you prepare for it in good way. Main Menu. Subscribe to Forum.

Enter your email address: Recent Posts. All Design And Manfacturing study notes at one place by nirz4all [May 30, , SMF 2. March 23, , All the Best. March 17, , April 26, , March 18, , May 14, , March 30, , January 07, , Adevice wanting to communicate with another device on the network sends a broadcastmessage onto the wire that all other devices see, but only the intended recipient actuallyaccepts and processes the message.

Did you miss your activation email? Author Topic: The multiplier will then be positive so the algorithm will work. For example, adding 15and Note that not all outputs have a corresponding

CARRY from Tucson
Please check my other posts. I have a variety of hobbies, like learning to pilot a plane. I do like sharing PDF docs utterly.